The ISETC26 Organizing Committee invites you to attend the 17th International Symposium on Electronics and Telecommunications, Timisoara, Romania in November 4-6, 2026

Programul de Master - Automotive Electronic Systems

Promoția 2026 - 2028

Semestrul I

  Denumirea disciplinei credite structura disciplinei
c s l p
1 Opțional 1. Deep Neural Networks/Car to Car Communication/Design and Research Methodology 5 2 0 2 0
2 High Performance Computing, Memories and Smart Sensors 5 2 0 0 2
3 Reliability and Functional Safety Elements of Microelectronics Systems 5 2 0 1 1
4 Advances in Power Electronics Design 5 2 0 0 2
5 Academic Ethics and Integrity 2 1 0.5 0 0
6 Practica de Cercetare 1 (Research Practice 1) 8 0 0 0 0

Semestrul II

  Denumirea disciplinei credite structura disciplinei
c s l p
1 Opțional 2. Quality Management in the Automotive Industry/Machine Learning/Arhitectures for Intelligent Data Processing 6 2 0 1 0
2 Microelectronics Systems Modelling and Design 5 2 0 2 0
3 Thermal Design and Techniques to Minimize Disruptive Effects 6 2 0 2 1
4 Automotive Communication Protocols 5 2 0 2 0
5 Practica de Cercetare 2 (Research Practice 2) 8 0 0 0 0

Semestrul III

  Denumirea disciplinei credite structura disciplinei
c s l p
1 Opțional 3. Low Power Electronic Systems/Modern Programming Techniques 5 2 0 2 0
2 Opțional 4. Elements of Artificial Intelligence/Optimization of Electronic Products for Series Production 6 2 0 2 0
3 Digital Control of Electronic Power Converters 6 2 0 1 2
4 Analog Mixed IC Automated Testing 5 2 0 2 0
5 Practica de Cercetare 3 (Research Practice 3) 8 0 0 0 0

Opțional semestrul I

  Denumirea disciplinei credite structura disciplinei
c s l p
1 Opțional 1. Deep Neural Networks 5 2 0 2 0
2 Opțional 1. Car to Car Communication 5 2 0 2 0
3 Opțional 1. Design and Research Methodology 5 2 0 2 0

Opțional semestrul II

  Denumirea disciplinei credite structura disciplinei
c s l p
1 Opțional 2. Quality Management in the Automotive Industry 6 2 0 1 0
2 Opțional 2. Machine Learning 6 2 0 1 0
3 Opțional 2. Arhitectures for Intelligent Data Processing 6 2 0 1 0